This invention relates to a logic probe for determining the logic level of a selected part of a circuit, and more particularly to a logic probe including a pulse light for indicating transitions of measured voltage levels from one logic condition to another.
In a logic probe, such as the one shown in U.S. Pat. No. 3,525,939, a logic probe is shown in which a first lamp is energized whenever the voltage level at the tip of the probe is above a first predetermined magnitude or threshold level, which may be referred to as a logic "1," logic true, or high condition. A second lamp, which might be a different color, indicates a voltage at the tip is below a second predetermined magnitude or threshold level, less than the first predetermined level, sometimes referred to as a logic "0," logic false, or low condition. Neither light is illuminated if the voltage at the probe is between these two predetermined voltage levels -- a voltage range commonly referred to as the deadband.
When measuring steady state input voltage to the probe, and assuming the circuit under test is operating properly, either the logic "1" or the logic "0" lamps will be energized. When the probe is connected to a circuit which is transitioning from the logic "1" to the logic "0" conditions, and wherein the duty cycle is fifty percent, both the logic "1" and the logic "0" lamps will appear to be energized simultaneously, and with equal brilliance. As the duty cycle is varied, however, one of the lamps may become too dim to indicate that a pulse is actually transitioning into that logic state, even momentarily. For this reason, a circuit is added to the logic probe which senses the transition of the measured input voltage through the threshold level, and this circuit causes a pulse lamp to energize to indicate that the input signal is not steady state as might appear from observing only the "1" and "0" lamps.
It has been found, however, that the pulse lamp will be energized whenever the measured voltage transitions across one threshold level, and the circuit under test may in fact be defective in that the input is not transitioning completely through the deadband from one logic condition to another. Therefore, the assumption that the operator makes based on his observation of the logic level lamps and the pulse lamp may be in error.